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Top 1014 audits verification PDF Book Page 34

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IEEE standard 1800-2009 for SystemVerilog--unified hardware design, specification, and verification language

authorsponsor, Design Automation Standards Committee of the IEEE Computer Society and the IEEE Standards Association Corporate Advisory Group.
pages1285 Pages
file size11.051 MB

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Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems

authorFilip Thoen, Francky Catthoor (auth.), Filip Thoen, Francky Catthoor (eds.)
pages444 Pages
release year2000
file size12.481 MB

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Verification, Model Checking, and Abstract Interpretation: 7th International Conference, VMCAI 2006, Charleston, SC, USA, January 8-10, 2006. Proceedings

authorPeter Schachte, Harald Søndergaard (auth.), E. Allen Emerson, Kedar S. Namjoshi (eds.)
pages452 Pages
release year2006
file size4.442 MB

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